The present invention relates: to a semiconductor device and its manufacturing method; and in particular to a semiconductor device having a redistribution line comprising a metallic film above a plurality of wiring layers formed over the main surface of a semiconductor substrate and a technology effectively applicable to the manufacturing method of the semiconductor device.
In a semiconductor device, a multilayered wire (Cu wire or Al wire) comprising a metallic film containing Cu (copper) or Al (aluminum) as the main component for example is formed above a semiconductor substrate in which a semiconductor element such as a CMIS (Complementary Metal Insulator Semiconductor) transistor is formed for example and a final passivation film is formed above the multilayered wire.
In Japanese Unexamined Patent Application Publication No. Hei 4(1992)-242960 (Patent Literature 1), disclosed is a technology of forming a coated wire by differentiating a material for covering the upper part and lower part of a Cu wire from a material for covering the sidewall, namely by using materials having dry etching speeds different from each other, and by applying anisotropic etching without undergoing a photoresist process. Then in Example 1, disclosed is the example of forming an Mo/Cu/Mo three-layered film by sputtering, then forming a photoresist above the film (a), forming a pattern by ion milling or dry etching (b), successively forming an SiN film as a sidewall film (c), and successively manufacturing a coated Cu wire having a desired sidewall barrier by applying anisotropic etching by ion milling or dry etching.